As part of the ongoing evolution of wireless communications systems and terminals, power consumption has always been of major concern. It is important to conserve the battery life for as long as possible and one way of doing this is to set a device into “sleep mode” whenever it is not being actively used by a user or a system. In such a sleep mode, some of the circuitry is deactivated in order to save energy. In a sleep mode, many of the hardware components are run by low power, slower “sleep” clocks instead of fast clocks, which are required when the device is active or “awake”. However, to keep the overall cost of a device low, sleep clocks are often manufactured from relatively inexpensive parts and thus tend to show a larger frequency drift than their faster counterparts. Such a frequency drift could potentially cause different circuit components to be out of sync with each other and thus render communication between the two impossible. Moreover, temperature changes can affect the amount of frequency drift. To overcome problems of frequency drift, the sleep clock needs to be calibrated and corrected repeatedly to keep it somewhat in line with the rest of the circuitry.
In one prior art technique, calibration of the sleep clock is performed every time the device is in an active or awake mode. The calibration measurements take place over the whole period that the device is in the awake mode. During such awake modes, the fast clock and the slow clock are both running simultaneously, thus allowing comparison between the two clocks. When the device then goes into sleep mode, the calibration for the sleep clock is used. However, if the device is not in the awake mode for long enough, the new calibration may not be good enough to ensure proper operation.
In another prior art technique, calibration of the sleep clock is performed whenever required through a forced calibration. Such forced calibrations require the device to be put into awake mode simply to perform another calibration and this therefore consumes extra energy simply to achieve calibration.
In a further prior art technique, estimates of the sleep clock frequency are made by comparing the sleep clock frequency to the fast clock frequency while in an awake mode (prior to entering a sleep mode), and then correcting for frequency drift of the sleep clock frequency while the device is in sleep mode by using the timing drift of the first arriving path at wakeup.